Showing posts with label dynamic. Show all posts
Showing posts with label dynamic. Show all posts

Dynamic RAM: modules

DRAM packages are in turn often assembled into plug-in modules for easier handling. Some standard module types in order of increasing speeds are:

-DIP(Dual in-line Package) 16-pin (chip)

-SIPP(Single In-line Pin Package) (usually FPRAM)

-SIMM(Single In-line Memory Module) 30-pin (usually FPRAM)

-SIMM 72-pin (often EDO RAM)

-DIMM(Dual In-line Memory Module) 168-pin (SDRAM: Synchronous DRAM)

-DIMM 184-pin (DDR SDRAM: Double Data Rate SDRAM)

-RIMM(Rambus In-line Memory Module) 184-pin (RDRAM: Rambus DRAM)

-DIMM 240-pin (DDR2 SDRAM / DDR3 SDRAM)

Dynamic RAM: more info

Dynamic random-access memory (DRAM) is a type of random-access memory (RAM) that stores each bit of data in a separate capacitor within an integrated circuit. The capacitor can be either charged or discharged; these two states are taken to represent the two values of a bit, conventionally called 0 and 1.
DRAM is volatile memory, since it loses its data quickly when power is removed. The transistors and capacitors used are extremely small; hundreds of billions can fit on a single memory chip.
Dynamic random access memory is produced as integrated circuits bonded and mounted into plastic packages with metal pins for connection to control signals and buses.
Today, these DRAM packages are in turn often assembled into plug-in modules that are installed into RAM sockets in the motherboard for easier handling.
DRAM is usually arranged in a square array of one capacitor and transistor per data bit storage cell. Typically, manufacturers specify that each row must have its storage cell capacitors refreshed every 64 ms or less. Refresh logic is provided in a DRAM controller which automates the periodic refresh, so no software or other hardware has to perform it. This makes the controller's logic circuit more complicated, but this drawback is outweighed by the fact that DRAM is much cheaper per storage cell and because each storage cell is very simple, DRAM has much greater capacity per geographic area than SRAM.